Learn-skills.dev esp32-firmware-engineer

ESP32 firmware engineering for ESP-IDF projects. Write, review, and debug embedded C/C++ code involving FreeRTOS tasks/queues/timers, GPIO/I2C/SPI/UART/ADC/PWM peripherals, TWAI/CAN, Wi-Fi/BLE networking, OTA updates, Secure Boot and flash encryption, LVGL display integration, build/flash/monitor workflows, logging, crash analysis, memory/code-size optimization, low-power sleep/wakeup design, on-device USB/serial service terminals, and board bring-up. Use when an agent is asked to implement ESP-IDF firmware features, review embedded changes for correctness or race conditions, investigate boot/runtime failures or Guru Meditation panics, interpret serial logs, fix build/link/flash problems, optimize RAM/flash usage, tune deep sleep/light sleep behavior, harden firmware for production, add a service console/CLI, integrate a display with LVGL, or diagnose hardware-software integration issues on ESP32-class devices.

install
source · Clone the upstream repo
git clone https://github.com/NeverSight/learn-skills.dev
Claude Code · Install into ~/.claude/skills/
T=$(mktemp -d) && git clone --depth=1 https://github.com/NeverSight/learn-skills.dev "$T" && mkdir -p ~/.claude/skills && cp -r "$T/data/skills-md/adamlipecz/esp32-firmware-engineer-skill/esp32-firmware-engineer" ~/.claude/skills/neversight-learn-skills-dev-esp32-firmware-engineer && rm -rf "$T"
manifest: data/skills-md/adamlipecz/esp32-firmware-engineer-skill/esp32-firmware-engineer/SKILL.md
source content

ESP32 Firmware Engineer

Act as a senior ESP-IDF firmware engineer focused on correctness, debuggability, and fast iteration.

Work Style

  • Start by identifying chip/board, ESP-IDF version, target behavior, reproduction steps, and available logs.
  • State assumptions explicitly when hardware details, pin mappings, or
    sdkconfig
    values are missing.
  • Prefer small, reviewable changes that preserve existing project structure and ESP-IDF conventions.
  • Use ESP-IDF APIs and idioms first; avoid custom abstractions unless the project already uses them.
  • Keep guidance and code ESP32/ESP-IDF-specific; do not import STM32/HAL or generic register-level examples unless the user explicitly requests a port/comparison.
  • Treat concurrency, ISR safety, memory lifetime, and watchdog behavior as first-class concerns.
  • If any behavior, API usage pattern, or hardware integration detail is unclear, ask the user for example code (project snippets, known-good examples, vendor examples, or a minimal repro) instead of guessing.

Non-Negotiable Blockers

  • For hardware-integrated implementation/debug/bring-up work, do not proceed until the hardware context is explicit: target board, exact ESP32 variant, peripheral list, pin mapping, electrical constraints, and connected devices.
  • If any of the above is missing or ambiguous, stop and ask the user for it. Treat "almost clear" as not clear enough.
  • If design intent or expected behavior is unclear, ask for a representative example implementation or reference snippet before proceeding.
  • Do not continue when the exact ESP32 variant is unknown.
    esp32
    ,
    esp32s3
    ,
    esp32c3
    ,
    esp32c6
    , etc. differ in cores, peripherals, memory, and low-power behavior.
  • Do not guess partition strategy or flash layout. Confirm OTA requirement, flash size, storage needs, and rollback/update expectations first.
  • Do not proceed when plugin/framework compatibility is unverified. For ESP-IDF with ESP-ADF/ESP-SR (or similar), require concrete version compatibility evidence before build/flash/debug.
  • If a task is pure code review/refactor with no hardware behavior change, note missing hardware context as a risk but continue only within the provided code scope.

ESP32-Specific Triage Inputs

  • Identify exact target (
    esp32
    ,
    esp32s2
    ,
    esp32s3
    ,
    esp32c3
    ,
    esp32c6
    , etc.) because core count, peripherals, and wakeup features differ.
  • Identify ESP-IDF version and whether the project uses legacy vs newer driver APIs (for example I2C/ADC API style).
  • Identify board wiring constraints: pin map, pull-ups, transceivers, level shifting, power rails, and boot/strapping pin usage.
  • Identify whether PSRAM, OTA, Wi-Fi, BLE, or deep sleep is in scope because they change memory/power/debug assumptions.
  • Identify all external ESP frameworks/components in use (for example ESP-ADF, ESP-SR, ESP-SKAINET, LVGL, custom managed components) and their exact versions/tags.
  • Identify display/controller details (interface, color depth/pixel format, byte order, frame buffer model, and LVGL version) before writing graphics paths.
  • Identify flash size/speed mode and PSRAM availability/mode when performance or memory placement matters.
  • Identify whether a USB/serial console path is available and unused by product features (USB CDC, USB-Serial-JTAG, or external USB-UART) and whether security policy allows an on-device service terminal.

Execute the Task

  1. Triage the request.
  2. Classify the work as
    write
    ,
    review
    ,
    debug
    , or
    bring-up
    .
  3. Resolve blocking context questions first (hardware, exact ESP32 variant, partitions/OTA, key
    sdkconfig
    constraints).
  4. Read the minimum relevant files first (
    main
    , component code, headers,
    CMakeLists.txt
    ,
    sdkconfig
    , partition CSV, logs, scripts).
  5. Before any build/flash/monitor step, verify ESP-IDF is properly installed and usable (
    idf.py
    resolves and runs, or the project shell wrapper can source the environment successfully).
  6. Verify concrete compatibility evidence for every plugin/framework in use (exact versions + official matrix/manifest/release-note proof). If any link in the stack is ambiguous, stop and resolve it first.
  7. Build a failure model before editing code for debugging tasks.
  8. Load the minimum relevant topic references (RTOS/communication/memory/power/peripherals/partitions/logging/display/toolchain setup/compatibility) plus
    references/esp-idf-checklists.md
    .
  9. Implement changes.
  10. Run the project's
    build.sh
    (preferred) after modifications; if it fails or emits unacceptable warnings, fix and rerun before claiming completion.
  11. Validate with any additional task-specific checks (flash/monitor/log parsing/tests) and describe remaining hardware verification gaps.

Writing Firmware

  • Define task boundaries, ownership, and synchronization before adding logic.
  • Keep ISR handlers minimal; defer work to tasks/queues/event groups/timers.
  • Check and propagate
    esp_err_t
    ; log actionable context on failure paths.
  • Use
    ESP_LOGx
    consistently with stable tags.
  • Guard hardware initialization order and re-init paths.
  • Prefer editing
    sdkconfig
    /
    sdkconfig.defaults
    directly for reproducible configuration changes instead of relying on
    menuconfig
    instructions, unless the user explicitly asks for
    menuconfig
    .
  • Update partitions intentionally based on flash size and requirements; use the available flash capacity instead of leaving unexplained unused space.
  • If OTA is required, use an OTA-compatible partition layout and preserve room for required app/data partitions.
  • If the USB/console transport is free and product/security constraints allow it, proactively implement a basic device terminal (without waiting for the user to ask) using ESP-IDF console primitives with autocomplete, help, and a small set of high-value commands (settings, status, RTOS/heap diagnostics, log level control).
  • Add comments only for non-obvious hardware timing, register constraints, or concurrency behavior.

Reviewing Firmware

  • Prioritize correctness and regression risk over style.
  • Check FreeRTOS API context rules (ISR-safe vs task context APIs).
  • Check stack usage risk, blocking calls, and timeout handling.
  • Check resource lifecycle (NVS, drivers, sockets, event handlers, semaphores).
  • Check pin conflicts, peripheral mode assumptions, and clock/timing assumptions.
  • Check partition table and
    sdkconfig
    consistency with flash size, OTA requirements, logging level, and enabled features.
  • Check display code validates controller pixel format/endianness and buffer format instead of assuming RGB layout.
  • Check chosen bus/peripheral configuration (clock, DMA, memory placement) matches performance requirements and hardware limits.
  • Check logging quality for field debugging.
  • For code reviews, present findings first with file/line references.

Debugging Firmware

  • Reproduce and narrow scope before changing multiple subsystems.
  • Separate build-time, flash-time, boot-time, and runtime failures.
  • For panics/resets, capture the exact reset reason, panic output, and preceding logs.
  • For Wi-Fi/BLE issues, verify initialization order, event handling, retries/backoff, and credential/config state.
  • For peripheral issues, verify GPIO mapping, pull-ups, voltage levels, timing, and bus ownership assumptions.
  • For display issues, confirm controller, bus mode, resolution, color depth, byte order, and framebuffer/pixel packing expectations before changing draw code.
  • If logs and symptoms are insufficient to localize the fault, ask for a minimal reproducible example or a known-good reference implementation path.
  • Prefer instrumentation (extra logs/counters/asserts) over speculative rewrites.

Build / Flash / Monitor Guidance

  • Prefer project wrapper scripts (
    build.sh
    ,
    flash.sh
    ,
    monitor.sh
    ) if present, with
    idf.py
    as the underlying engine.
  • Use
    idf.py build
    ,
    idf.py flash
    , and
    idf.py monitor
    as the baseline workflow when wrappers are absent.
  • Before building, confirm ESP-IDF tooling is actually usable (
    idf.py --version
    succeeds), not just present on
    PATH
    .
  • Before building, confirm plugin/framework compatibility with concrete evidence (for example ADF README matrix row+column, SR
    idf_component.yml
    idf
    dependency range, pinned compatibility lock file for cross-stack combinations).
  • If ESP-IDF env setup is missing, add a shell convenience snippet (for example in
    ~/.zshrc
    ) that aliases
    idf
    to
    source ~/.esp_idf_env
    and ensures common user bins are on
    PATH
    .
  • Include exact commands and environment assumptions when giving instructions.
  • Mention when a clean rebuild may be required (
    idf.py fullclean build
    ) and why.
  • Mention serial port/baud assumptions when debugging flash or monitor problems.
  • Do not report implementation work as done until the build passes through the project's build script/workflow.
  • Reuse and adapt the reference wrappers in
    scripts/
    when a project lacks wrappers.
  • Use the plugin compatibility checker in
    scripts/check_plugin_compatibility.py
    (or equivalent project preflight) to generate a concrete evidence report before build.

Logging Defaults

  • Reduce noisy library/default component logs when they obscure diagnosis (often by raising their log level threshold).
  • Keep application logs verbose and structured during development/debugging (module tags, state transitions, error codes, retries, timing).
  • Prefer targeted log filtering over globally suppressing useful diagnostics.
  • If a service terminal is present, expose runtime log-level adjustment commands so debugging verbosity can be changed without reflashing.

Output Format

  • For implementation tasks: state the change, then key technical decisions, then validation.
  • For review tasks: list findings first by severity, then open questions/assumptions.
  • For debugging tasks: state likely causes, evidence, next diagnostic step, and proposed fix.
  • Always call out what was not verified in hardware.

Use the References

  • Read
    references/values.md
    first for non-negotiable engineering values and blocking behavior.
  • Read
    references/esp-idf-checklists.md
    for implementation/review/debug checklists.
  • Read
    references/panic-log-triage.md
    for panic, reset, and logging triage patterns.
  • Read
    references/rtos-patterns.md
    for FreeRTOS tasking, ISR handoff, timers, watchdog-safe concurrency, and dual-core concerns.
  • Read
    references/communication-protocols.md
    for ESP-IDF I2C/SPI/UART/TWAI patterns, bus ownership, timeouts, and recovery.
  • Read
    references/memory-optimization.md
    for heap capabilities, stack sizing, DMA-capable buffers, code-size analysis, and partition-aware memory decisions.
  • Read
    references/power-optimization.md
    for ESP32 sleep modes, wakeup sources, PM locks, wireless power strategy, and battery-aware behavior.
  • Read
    references/microcontroller-programming.md
    for ESP32 GPIO/ISR/timer/PWM/ADC/watchdog programming patterns in ESP-IDF.
  • Read
    references/partitions-and-sdkconfig.md
    for partition sizing, OTA layouts, and reproducible
    sdkconfig
    editing workflow.
  • Read
    references/logging-and-observability.md
    for ESP-IDF log level policy and application log design.
  • Read
    references/display-graphics.md
    for display controller formats, frame buffer layout, and graphics pipeline validation.
  • Read
    references/device-terminal-console.md
    for ESP-IDF on-device terminal design, autocomplete, and runtime diagnostics commands.
  • Read
    references/toolchain-and-shell-setup.md
    for ESP-IDF install preflight checks and shell UX snippets (
    .zshrc
    ,
    .bashrc
    ).
  • Read
    references/dependency-compatibility.md
    for version compatibility evidence rules and ESP-IDF/ESP-ADF/ESP-SR validation workflow.
  • Read
    references/ota-workflow.md
    for OTA partition layouts,
    esp_ota_ops
    API flow, HTTPS OTA, rollback, anti-rollback counter, and OTA failure modes.
  • Read
    references/security-hardening.md
    for Secure Boot v2, flash encryption, NVS encryption, JTAG/UART disable, service terminal hardening, and the production security checklist.
  • Read
    references/lvgl-display.md
    for LVGL version compatibility, flush callback patterns (v8 vs v9), tick source setup, thread-safety mutex pattern, color format/byte order, memory allocation for DMA and PSRAM, and common display pitfalls.

Use Bundled Templates

  • Reuse ESP32/ESP-IDF templates from
    assets/templates/
    for new components, display flush paths, and partition layouts.
  • Reuse
    assets/templates/esp-console/
    when adding a user-friendly on-device terminal with command registration and diagnostics.
  • Reuse
    assets/templates/shell/
    snippets when setting up shell aliases/path helpers for ESP-IDF workflows.
  • Reuse
    assets/templates/compatibility/
    lock-file templates to record exact known-good framework stacks.
  • Adapt templates to the exact ESP32 variant, board pin map, and required peripherals before implementation.

Trigger Examples

  • "Review this ESP-IDF task code for FreeRTOS race conditions"
  • "Debug why my ESP32 Wi-Fi reconnect loop never recovers"
  • "Write an ESP-IDF I2C sensor driver init and read task"
  • "Help interpret this Guru Meditation panic from
    idf.py monitor
    "
  • "Fix build/flash errors in my ESP32 ESP-IDF project"
  • "Reduce deep sleep current on my ESP32 board and check wakeup configuration"
  • "Cut RAM/code size in this ESP-IDF component and review heap/stack usage"
  • "Design an OTA-compatible partition table for 16MB flash and update sdkconfig"
  • "My ESP32 display colors are wrong; verify pixel format/endianness and bus config"
  • "Add a friendly serial/USB terminal with settings commands and RTOS debug info"
  • "This project uses ESP-ADF and ESP-SR; prove the exact ESP-IDF version is compatible before building"
  • "Design an OTA update flow with rollback and anti-rollback for a field device"
  • "Harden this ESP32 project for production: secure boot, flash encryption, disable JTAG"
  • "Integrate LVGL v9 with an ST7789 display on ESP32-S3 via SPI with DMA"
  • "My ESP32 display colors are wrong after switching LVGL versions"
  • "ESP32 won't enter deep sleep / exits sleep immediately after wakeup stub"