Skills synthetic-bio-circuit-designer
Design gene circuits for synthetic biology applications
install
source · Clone the upstream repo
git clone https://github.com/openclaw/skills
Claude Code · Install into ~/.claude/skills/
T=$(mktemp -d) && git clone --depth=1 https://github.com/openclaw/skills "$T" && mkdir -p ~/.claude/skills && cp -r "$T/skills/aipoch-ai/synthetic-bio-circuit-designer" ~/.claude/skills/openclaw-skills-synthetic-bio-circuit-designer && rm -rf "$T"
OpenClaw · Install into ~/.openclaw/skills/
T=$(mktemp -d) && git clone --depth=1 https://github.com/openclaw/skills "$T" && mkdir -p ~/.openclaw/skills && cp -r "$T/skills/aipoch-ai/synthetic-bio-circuit-designer" ~/.openclaw/skills/openclaw-skills-synthetic-bio-circuit-designer && rm -rf "$T"
manifest:
skills/aipoch-ai/synthetic-bio-circuit-designer/SKILL.mdsource content
Synthetic Bio Circuit Designer
Design and simulate gene circuits for synthetic biology.
Usage
python scripts/main.py --type toggle --p1 P1 --p2 P2 python scripts/main.py --type oscillator
Circuit Types
- Toggle switch: Bistable genetic switch
- Oscillator: Repressilator circuit
Output
- Circuit design
- Component list
- Expected behavior
Risk Assessment
| Risk Indicator | Assessment | Level |
|---|---|---|
| Code Execution | Python/R scripts executed locally | Medium |
| Network Access | No external API calls | Low |
| File System Access | Read input files, write output files | Medium |
| Instruction Tampering | Standard prompt guidelines | Low |
| Data Exposure | Output files saved to workspace | Low |
Security Checklist
- No hardcoded credentials or API keys
- No unauthorized file system access (../)
- Output does not expose sensitive information
- Prompt injection protections in place
- Input file paths validated (no ../ traversal)
- Output directory restricted to workspace
- Script execution in sandboxed environment
- Error messages sanitized (no stack traces exposed)
- Dependencies audited
Prerequisites
No additional Python packages required.
Evaluation Criteria
Success Metrics
- Successfully executes main functionality
- Output meets quality standards
- Handles edge cases gracefully
- Performance is acceptable
Test Cases
- Basic Functionality: Standard input → Expected output
- Edge Case: Invalid input → Graceful error handling
- Performance: Large dataset → Acceptable processing time
Lifecycle Status
- Current Stage: Draft
- Next Review Date: 2026-03-06
- Known Issues: None
- Planned Improvements:
- Performance optimization
- Additional feature support